[PDF][PDF] Video & Graphics Processors: 1997
JA Watlington - 1997 - media.mit.edu
… The use of a single programmable CPU core to perform ALL operations in a system is a
cornerstone of the MicroUnity MediaProcessor architecture. From the perspective of this survey, …
cornerstone of the MicroUnity MediaProcessor architecture. From the perspective of this survey, …
NNUAL INDEX
M Abdelguerfi, BS Kaliski Jr - computer.org
… Smith, Aug., 6-9."MicroUnity's MediaProcessor Architecture," Craig Hansen, Aug., 34-41."MMX
Technology Extension to the Intel Architecture," Alex Peleg and Uri Weiser, Aug., 42-50."…
Technology Extension to the Intel Architecture," Alex Peleg and Uri Weiser, Aug., 42-50."…
6 Guest Editors' Introduction: Media Processing: A New Design Target
FH Series - ieeexplore.ieee.org
… 34 MicroUnity's Mediaprocessor Architecture …
Simultaneous multithreaded processor enhanced for multimedia applications
F Mombers, M Thomas - Media Processors 2000, 1999 - spiedigitallibrary.org
The paper proposes a new media processor architecture specifically designed to handle
state-of-the-art multimedia encoding and decoding tasks. To achieve this, the architecture …
state-of-the-art multimedia encoding and decoding tasks. To achieve this, the architecture …
Design methodology for programmable video signal processors
This paper presents a design methodology for a high- performance, programmable video
signal processor (VSP). The proposed design methodology explores both technology-driven …
signal processor (VSP). The proposed design methodology explores both technology-driven …
Efficient polygon clipping for an SIMD graphics pipeline
BO Schneider, J van Welzen - IEEE Transactions on Visualization & …, 1998 - computer.org
Abstract—Recently, SIMD processors have become popular architectures for multimedia.
Though most of the 3D graphics pipeline can be implemented on such SIMD platforms in a …
Though most of the 3D graphics pipeline can be implemented on such SIMD platforms in a …
[PDF][PDF] on Compilation
J Lumley - 1997 - shiftleft.com
February, 1997 packed arithmetic, Packed arithmetic instructions attempt to harness compilation
the unused power within 32 and 64 bit ALUs to speed principally multimedia application …
the unused power within 32 and 64 bit ALUs to speed principally multimedia application …
[PS][PS] Measuring the Performance of Multimedia Instruction Sets
NSAJ Smith - people.eecs.berkeley.edu
Many microprocessor instruction sets include instructions for accelerating multimedia
applications such as DVD playback, speech recognition and-D graphics. Despite general …
applications such as DVD playback, speech recognition and-D graphics. Despite general …
Mapping of application software to the multimedia instructions of general-purpose microprocessors
RB Lee, L McMahan - Multimedia Hardware Architectures …, 1997 - spiedigitallibrary.org
This paper describes how media processing programs may be accelerated by using the
multimedia instruction extensions that have been added to general-purpose microprocessors. …
multimedia instruction extensions that have been added to general-purpose microprocessors. …