DE60034346D1 - Apparatus and method for selective shutdown of integrated circuit blocks - Google Patents

Apparatus and method for selective shutdown of integrated circuit blocks

Info

Publication number
DE60034346D1
DE60034346D1 DE60034346T DE60034346T DE60034346D1 DE 60034346 D1 DE60034346 D1 DE 60034346D1 DE 60034346 T DE60034346 T DE 60034346T DE 60034346 T DE60034346 T DE 60034346T DE 60034346 D1 DE60034346 D1 DE 60034346D1
Authority
DE
Germany
Prior art keywords
integrated circuit
circuit blocks
selective shutdown
shutdown
selective
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60034346T
Other languages
German (de)
Inventor
Russell Francis
Michele Alia
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Application granted granted Critical
Publication of DE60034346D1 publication Critical patent/DE60034346D1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3237—Power saving characterised by the action undertaken by disabling clock generation or distribution
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3243—Power saving in microcontroller unit
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Power Sources (AREA)
DE60034346T 2000-11-03 2000-11-03 Apparatus and method for selective shutdown of integrated circuit blocks Expired - Lifetime DE60034346D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP00830732A EP1204017B1 (en) 2000-11-03 2000-11-03 Device and method for selectively powering down integrated circuit blocks

Publications (1)

Publication Number Publication Date
DE60034346D1 true DE60034346D1 (en) 2007-05-24

Family

ID=8175539

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60034346T Expired - Lifetime DE60034346D1 (en) 2000-11-03 2000-11-03 Apparatus and method for selective shutdown of integrated circuit blocks

Country Status (3)

Country Link
US (1) US20020184547A1 (en)
EP (1) EP1204017B1 (en)
DE (1) DE60034346D1 (en)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1363179A1 (en) * 2002-05-17 2003-11-19 STMicroelectronics S.A. Architecture for controlling dissipated power in a system on a chip and related system
US7376854B2 (en) * 2004-03-31 2008-05-20 Intel Corporation System for enabling and disabling voltage regulator controller of electronic appliance according to a series of delay times assigned to voltage regulator controllers
WO2006088167A2 (en) * 2005-02-16 2006-08-24 Matsushita Electric Industrial Co., Ltd. Power supply control circuit and electronic circuit
US8201004B2 (en) * 2006-09-14 2012-06-12 Texas Instruments Incorporated Entry/exit control to/from a low power state in a complex multi level memory system
EP1927042A2 (en) 2005-09-12 2008-06-04 Nxp B.V. Power management for buses in cmos circuits
US20070124607A1 (en) * 2005-11-30 2007-05-31 Samsung Electronics Co., Ltd. System and method for semi-automatic power control in component architecture systems
US20080068238A1 (en) * 2006-09-14 2008-03-20 Texas Instruments Incorporated Entry/Exit Control To/From a Low Power State in a CPU with an Unprotected Pipeline
US7949887B2 (en) 2006-11-01 2011-05-24 Intel Corporation Independent power control of processing cores
US8397090B2 (en) * 2006-12-08 2013-03-12 Intel Corporation Operating integrated circuit logic blocks at independent voltages with single voltage supply
US7747882B2 (en) * 2007-01-22 2010-06-29 International Business Machines Corporation Determining optimal power down of a system while indexes are being rebuilt
US8448003B1 (en) * 2007-05-03 2013-05-21 Marvell Israel (M.I.S.L) Ltd. Method and apparatus for activating sleep mode
US8145923B2 (en) * 2008-02-20 2012-03-27 Xilinx, Inc. Circuit for and method of minimizing power consumption in an integrated circuit device
US8022526B2 (en) 2009-08-07 2011-09-20 Advanced Processor Architectures, Llc Distributed computing
US9645603B1 (en) 2013-09-12 2017-05-09 Advanced Processor Architectures, Llc System clock distribution in a distributed computing environment
US9429983B1 (en) 2013-09-12 2016-08-30 Advanced Processor Architectures, Llc System clock distribution in a distributed computing environment
US11042211B2 (en) 2009-08-07 2021-06-22 Advanced Processor Architectures, Llc Serially connected computing nodes in a distributed computing system
CN102270030B (en) * 2010-05-07 2015-09-09 三星电子株式会社 SOC (system on a chip), there is its equipment and the electrical control method of this SOC (system on a chip)
US8494477B2 (en) * 2011-06-24 2013-07-23 Intel Corporation Power management for an electronic device
KR102154080B1 (en) * 2014-07-25 2020-09-09 삼성전자주식회사 Power management system, system on chip including the same and mobile device including the same
KR102325453B1 (en) * 2014-12-04 2021-11-11 삼성전자주식회사 Method for operating semiconductor device
US10078356B2 (en) * 2015-08-20 2018-09-18 Intel Corporation Apparatus and method for saving and restoring data for power saving in a processor
US10296067B2 (en) * 2016-04-08 2019-05-21 Qualcomm Incorporated Enhanced dynamic clock and voltage scaling (DCVS) scheme
US11126245B2 (en) * 2019-06-21 2021-09-21 Intel Corporation Device, system and method to determine a power mode of a system-on-chip

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5586307A (en) * 1993-06-30 1996-12-17 Intel Corporation Method and apparatus supplying synchronous clock signals to circuit components
US5677849A (en) * 1993-11-08 1997-10-14 Cirrus Logic, Inc. Selective low power clocking apparatus and method
US5615376A (en) * 1994-08-03 1997-03-25 Neomagic Corp. Clock management for power reduction in a video display sub-system
KR0142968B1 (en) * 1995-06-30 1998-08-17 김광호 Clock generator of semiconductor memory device
JPH09138716A (en) * 1995-11-14 1997-05-27 Toshiba Corp Electronic computer
US6088806A (en) * 1998-10-20 2000-07-11 Seiko Epson Corporation Apparatus and method with improved power-down mode
JP2000347761A (en) * 1999-06-02 2000-12-15 Alps Electric Co Ltd Control circuit
US6633987B2 (en) * 2000-03-24 2003-10-14 Intel Corporation Method and apparatus to implement the ACPI(advanced configuration and power interface) C3 state in a RDRAM based system

Also Published As

Publication number Publication date
EP1204017B1 (en) 2007-04-11
US20020184547A1 (en) 2002-12-05
EP1204017A1 (en) 2002-05-08

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Legal Events

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