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Computer Science > Hardware Architecture

arXiv:2606.27892 (cs)
[Submitted on 26 Jun 2026]

Title:Co-Optimization of Analog Kolmogorov-Arnold Networks for Low-Power Function Approximation in Flexible Electronics

Authors:Paula Carolina Lozano Duarte, Georgios Zervakis, Mehdi Tahoori, Sani Nassif
View a PDF of the paper titled Co-Optimization of Analog Kolmogorov-Arnold Networks for Low-Power Function Approximation in Flexible Electronics, by Paula Carolina Lozano Duarte and Georgios Zervakis and Mehdi Tahoori and Sani Nassif
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Abstract:Wearable devices and Internet of Things (IoT) sensors require on-sensor processing of biosignals and environmental data, including computationally demanding operations such as nonlinear activation functions for neural network inference, sensor calibration curves to map raw readings to physical units, and signal preprocessing functions like logarithmic compression and power operations for feature extraction. These functions exhibit significant complexity, often involving transcendental operations and multivariate dependencies that are costly to implement digitally. Analog function approximation provides a power-efficient alternative by performing these computations in the analog domain, thereby reducing the energy overhead associated with analog-to-digital conversion and subsequent digital processing. Flexible Electronics (FE) present a particularly attractive platform for wearable applications due to mechanical flexibility and low-cost fabrication, but impose strict constraints on circuit density and power consumption, making efficient analog implementations critical but challenging. This work introduces Analog Kolmogorov-Arnold Networks (AKANs), developed via hardware-software co-optimization, to approximate these complex multivariate functions accurately under hardware imperfections. Our method incorporates circuit-level error modeling during training and applies pruning at both software and hardware levels to reduce area and power. Validation across multiple benchmarks demonstrates that our proposed pruning methodology not only reduces hardware cost but can also improve approximation accuracy by regularizing spline parameters. Results show up to 55% area and 50% power savings, with average reductions of nearly 30% across datasets, highlighting AKANs as a robust and generalizable framework for low-power analog function approximation in FE.
Comments: Accepted for publication at IEEE Journal On Emerging and Selected Topics In Circuits and Systems. DOI https://doi.org/10.1109/JETCAS.2026.3707339
Subjects: Hardware Architecture (cs.AR); Emerging Technologies (cs.ET); Neural and Evolutionary Computing (cs.NE)
Cite as: arXiv:2606.27892 [cs.AR]
  (or arXiv:2606.27892v1 [cs.AR] for this version)
  https://doi.org/10.48550/arXiv.2606.27892
arXiv-issued DOI via DataCite
Related DOI: https://doi.org/10.1109/JETCAS.2026.3707339
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Submission history

From: Paula Carolina Lozano Duarte [view email]
[v1] Fri, 26 Jun 2026 09:35:48 UTC (3,885 KB)
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