SG47048A1 - Method and apparatus for operating a single cpu computer system as a multiprocessor system - Google Patents

Method and apparatus for operating a single cpu computer system as a multiprocessor system

Info

Publication number
SG47048A1
SG47048A1 SG1996004256A SG1996004256A SG47048A1 SG 47048 A1 SG47048 A1 SG 47048A1 SG 1996004256 A SG1996004256 A SG 1996004256A SG 1996004256 A SG1996004256 A SG 1996004256A SG 47048 A1 SG47048 A1 SG 47048A1
Authority
SG
Singapore
Prior art keywords
operating
single cpu
computer system
cpu computer
multiprocessor
Prior art date
Application number
SG1996004256A
Inventor
Adalberto Golbert
Douglas M Carmean
Roshan J Fernando
Amar A Ghori
Yoav Hochberg
Robert F Krick
Milind Mittal
Anurag Sah
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of SG47048A1 publication Critical patent/SG47048A1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a secondary processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a secondary processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Multi Processors (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
SG1996004256A 1993-05-21 1994-04-26 Method and apparatus for operating a single cpu computer system as a multiprocessor system SG47048A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/065,597 US5490279A (en) 1993-05-21 1993-05-21 Method and apparatus for operating a single CPU computer system as a multiprocessor system

Publications (1)

Publication Number Publication Date
SG47048A1 true SG47048A1 (en) 1998-03-20

Family

ID=22063821

Family Applications (1)

Application Number Title Priority Date Filing Date
SG1996004256A SG47048A1 (en) 1993-05-21 1994-04-26 Method and apparatus for operating a single cpu computer system as a multiprocessor system

Country Status (6)

Country Link
US (1) US5490279A (en)
JP (1) JP2660662B2 (en)
DE (1) DE4417068A1 (en)
GB (1) GB2278214B (en)
SG (1) SG47048A1 (en)
TW (1) TW399750U (en)

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US5896513A (en) * 1996-07-03 1999-04-20 Intel Corporation Computer system providing a universal architecture adaptive to a variety of processor types and bus protocols
US5845107A (en) * 1996-07-03 1998-12-01 Intel Corporation Signaling protocol conversion between a processor and a high-performance system bus
US5764934A (en) * 1996-07-03 1998-06-09 Intel Corporation Processor subsystem for use with a universal computer architecture
US5983297A (en) * 1996-12-30 1999-11-09 Intel Corporation Method and apparatus for upgrading a computer system
US6041372A (en) * 1996-12-30 2000-03-21 Intel Corporation Method and apparatus for providing a processor module for a computer system
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US5918023A (en) * 1997-06-09 1999-06-29 Compaq Computer Corporation System design to support either Pentium Pro processors, Pentium II processors, and future processor without having to replace the system board
US6098156A (en) * 1997-07-22 2000-08-01 International Business Machines Corporation Method and system for rapid line ownership transfer for multiprocessor updates
WO1999052029A1 (en) * 1998-04-01 1999-10-14 Omron Corporation Data processor and image processor
US6654714B1 (en) * 1998-05-22 2003-11-25 Micron Technology, Inc. Method and system for selecting compatible processors to add to a multiprocessor computer
US6480952B2 (en) 1998-05-26 2002-11-12 Advanced Micro Devices, Inc. Emulation coprocessor
US6308255B1 (en) 1998-05-26 2001-10-23 Advanced Micro Devices, Inc. Symmetrical multiprocessing bus and chipset used for coprocessor support allowing non-native code to run in a system
US6590907B1 (en) * 1999-10-01 2003-07-08 Stmicroelectronics Ltd. Integrated circuit with additional ports
US6631474B1 (en) * 1999-12-31 2003-10-07 Intel Corporation System to coordinate switching between first and second processors and to coordinate cache coherency between first and second processors during switching
US7725748B1 (en) 2000-12-29 2010-05-25 Intel Corporation Low power subsystem for portable computers
US6522165B2 (en) 2001-06-29 2003-02-18 Intel Corporation Bus termination scheme for flexible uni-processor and dual processor platforms
US7124410B2 (en) * 2002-01-09 2006-10-17 International Business Machines Corporation Distributed allocation of system hardware resources for multiprocessor systems
US7058829B2 (en) * 2002-08-14 2006-06-06 Intel Corporation Method and apparatus for a computing system having an active sleep mode CPU that uses the cache of a normal active mode CPU
TWI243311B (en) * 2004-08-18 2005-11-11 Asrock Inc Method and apparatus for upgradable computer design
US8660701B2 (en) * 2004-08-26 2014-02-25 A. O. Smith Corporation Modular control system and method for water heaters
US7613855B2 (en) * 2004-08-26 2009-11-03 A. O. Smith Corporation Modular control system and method for water heaters
US7574120B2 (en) * 2005-05-11 2009-08-11 A. O. Smith Corporation System and method for estimating and indicating temperature characteristics of temperature controlled liquids
US8245669B2 (en) * 2006-03-27 2012-08-21 A. O. Smith Corporation Water heating systems and methods
US20070246552A1 (en) * 2006-03-27 2007-10-25 Patterson Wade C Water heating systems and methods
US8887671B2 (en) * 2006-03-27 2014-11-18 A. O. Smith Corporation Water heating systems and methods
US8001310B2 (en) * 2009-03-04 2011-08-16 Hewlett-Packard Development Company, L.P. Scalable computer node having an expansion module that is socket-compatible with a central processing unit

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Also Published As

Publication number Publication date
JP2660662B2 (en) 1997-10-08
GB2278214B (en) 1998-02-25
JPH07141299A (en) 1995-06-02
GB2278214A (en) 1994-11-23
DE4417068A1 (en) 1995-01-12
US5490279A (en) 1996-02-06
GB9408238D0 (en) 1994-06-15
TW399750U (en) 2000-07-21

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