EP4418136A3 - Systems, apparatuses, and methods for fused multiply add - Google Patents

Systems, apparatuses, and methods for fused multiply add Download PDF

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Publication number
EP4418136A3
EP4418136A3 EP24187271.2A EP24187271A EP4418136A3 EP 4418136 A3 EP4418136 A3 EP 4418136A3 EP 24187271 A EP24187271 A EP 24187271A EP 4418136 A3 EP4418136 A3 EP 4418136A3
Authority
EP
European Patent Office
Prior art keywords
data elements
integer data
accumulation
integer
generate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP24187271.2A
Other languages
German (de)
French (fr)
Other versions
EP4418136A2 (en
Inventor
Robert Valentine
Galina RYVCHIN
Piotr MAJCHER
Mark J. Charney
Elmoustapha OULD-AHMED-VALL
Jesus Corbal
Milind B. Girkar
Zeev Sperber
Simon Rubanovich
Amit Gradstein
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Priority to EP24187271.2A priority Critical patent/EP4418136A3/en
Publication of EP4418136A2 publication Critical patent/EP4418136A2/en
Publication of EP4418136A3 publication Critical patent/EP4418136A3/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G06F9/30014—Arithmetic instructions with variable precision
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443—Sum of products
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30018—Bit or string instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3818—Decoding for concurrent execution

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)

Abstract

In some embodiments, an apparatus comprises: circuitry to fetch one or more instructions, the one or more instructions to indicate a first source vector comprising a first plurality of integer data elements, a second source vector comprising a second plurality of integer data elements, and one or more accumulation integer data elements, wherein each of the one or more accumulation integer data elements is four times larger than each data element of the first plurality of integer data elements and the second plurality of integer data elements, and wherein the first plurality of integer data elements and the one or more accumulation integer data elements are signed integer data elements and the second plurality of integer data elements are unsigned integer data elements; on-chip storage to store the first plurality of integer data elements, the second plurality of integer data elements, and the one or more accumulation integer data elements; and execution circuitry to execute the one or more instructions to generate one or more result integer data elements. To generate the one or more result integer data elements, the execution circuitry is to: multiply each data element of the first plurality of integer data elements with a corresponding data element of the second plurality of integer data elements to generate a plurality of products, and accumulate the plurality of products in groups of four, each group of four products to be accumulated with a corresponding accumulation integer data element of the one or more accumulation integer data elements with saturation to generate a corresponding one or more result integer data elements.
EP24187271.2A 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add Pending EP4418136A3 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP24187271.2A EP4418136A3 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
EP24187271.2A EP4418136A3 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add
EP16919077.4A EP3529695B1 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add
PCT/US2016/057991 WO2018075052A1 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add
EP21207389.4A EP3971710B1 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add

Related Parent Applications (3)

Application Number Title Priority Date Filing Date
EP21207389.4A Division-Into EP3971710B1 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add
EP21207389.4A Division EP3971710B1 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add
EP16919077.4A Division EP3529695B1 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add

Publications (2)

Publication Number Publication Date
EP4418136A2 EP4418136A2 (en) 2024-08-21
EP4418136A3 true EP4418136A3 (en) 2024-11-20

Family

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Family Applications (8)

Application Number Title Priority Date Filing Date
EP24187271.2A Pending EP4418136A3 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add
EP21207387.8A Pending EP3989062A1 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add
EP21207379.5A Pending EP3971709A1 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add
EP22203441.5A Active EP4148563B1 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add
EP23156307.3A Pending EP4198718A1 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add
EP21207395.1A Pending EP3971711A1 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add
EP16919077.4A Active EP3529695B1 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add
EP21207389.4A Active EP3971710B1 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add

Family Applications After (7)

Application Number Title Priority Date Filing Date
EP21207387.8A Pending EP3989062A1 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add
EP21207379.5A Pending EP3971709A1 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add
EP22203441.5A Active EP4148563B1 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add
EP23156307.3A Pending EP4198718A1 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add
EP21207395.1A Pending EP3971711A1 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add
EP16919077.4A Active EP3529695B1 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add
EP21207389.4A Active EP3971710B1 (en) 2016-10-20 2016-10-20 Systems, apparatuses, and methods for fused multiply add

Country Status (6)

Country Link
US (8) US11169802B2 (en)
EP (8) EP4418136A3 (en)
CN (5) CN119847604A (en)
PL (1) PL4148563T3 (en)
TW (4) TWI841041B (en)
WO (1) WO2018075052A1 (en)

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Also Published As

Publication number Publication date
TWI841041B (en) 2024-05-01
EP3971710B1 (en) 2024-11-06
US20210406011A1 (en) 2021-12-30
TWI761367B (en) 2022-04-21
US20230048998A1 (en) 2023-02-16
US20220012056A1 (en) 2022-01-13
EP4148563B1 (en) 2025-06-18
CN116009814A (en) 2023-04-25
TWI800118B (en) 2023-04-21
CN119847604A (en) 2025-04-18
CN109716290A (en) 2019-05-03
US11782709B2 (en) 2023-10-10
US11507369B2 (en) 2022-11-22
US11526353B2 (en) 2022-12-13
EP3971709A1 (en) 2022-03-23
EP3989062A1 (en) 2022-04-27
US20230418602A1 (en) 2023-12-28
CN109716290B (en) 2023-12-19
EP4198718A1 (en) 2023-06-21
TW202217603A (en) 2022-05-01
EP3971710A1 (en) 2022-03-23
CN115480730A (en) 2022-12-16
CN113885833B (en) 2025-05-13
EP3529695B1 (en) 2023-10-11
TWI860642B (en) 2024-11-01
US12124846B2 (en) 2024-10-22
EP4148563A1 (en) 2023-03-15
TW201823973A (en) 2018-07-01
US11526354B2 (en) 2022-12-13
EP3529695A1 (en) 2019-08-28
EP3529695A4 (en) 2020-07-15
US20250004763A1 (en) 2025-01-02
US20200026515A1 (en) 2020-01-23
TW202326409A (en) 2023-07-01
PL4148563T3 (en) 2025-10-20
EP3971711A1 (en) 2022-03-23
TW202311986A (en) 2023-03-16
US12608201B2 (en) 2026-04-21
WO2018075052A1 (en) 2018-04-26
CN113885833A (en) 2022-01-04
US11544058B2 (en) 2023-01-03
US20220012057A1 (en) 2022-01-13
US20220050678A1 (en) 2022-02-17
EP4418136A2 (en) 2024-08-21
US11169802B2 (en) 2021-11-09

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