EP0836137A3 - Visual instruction set for CPU with integrated graphics functions - Google Patents

Visual instruction set for CPU with integrated graphics functions Download PDF

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Publication number
EP0836137A3
EP0836137A3 EP97307482A EP97307482A EP0836137A3 EP 0836137 A3 EP0836137 A3 EP 0836137A3 EP 97307482 A EP97307482 A EP 97307482A EP 97307482 A EP97307482 A EP 97307482A EP 0836137 A3 EP0836137 A3 EP 0836137A3
Authority
EP
European Patent Office
Prior art keywords
cpu
instruction set
integrated graphics
visual instruction
graphics functions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP97307482A
Other languages
German (de)
French (fr)
Other versions
EP0836137A2 (en
Inventor
Robert Yung
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of EP0836137A2 publication Critical patent/EP0836137A2/en
Publication of EP0836137A3 publication Critical patent/EP0836137A3/en
Withdrawn legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443—Sum of products
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • Image Processing (AREA)
  • Executing Machine-Instructions (AREA)
  • Record Information Processing For Printing (AREA)
  • Advance Control (AREA)

Abstract

An optimized, superscalar microprocessor architecture for supporting graphics operations in addition to the standard microprocessor integer and floating point operations. A number of specialized graphics instructions and accompanying hardware for executing them are disclosed to optimize the execution of graphics instruction with minimal additional hardware for a general purpose CPU.
EP97307482A 1996-10-10 1997-09-24 Visual instruction set for CPU with integrated graphics functions Withdrawn EP0836137A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/722,442 US5996066A (en) 1996-10-10 1996-10-10 Partitioned multiply and add/subtract instruction for CPU with integrated graphics functions
US722442 1996-10-10

Publications (2)

Publication Number Publication Date
EP0836137A2 EP0836137A2 (en) 1998-04-15
EP0836137A3 true EP0836137A3 (en) 1998-07-15

Family

ID=24901855

Family Applications (1)

Application Number Title Priority Date Filing Date
EP97307482A Withdrawn EP0836137A3 (en) 1996-10-10 1997-09-24 Visual instruction set for CPU with integrated graphics functions

Country Status (4)

Country Link
US (3) US5996066A (en)
EP (1) EP0836137A3 (en)
JP (1) JPH113226A (en)
SG (2) SG103284A1 (en)

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Also Published As

Publication number Publication date
JPH113226A (en) 1999-01-06
US6385713B2 (en) 2002-05-07
US20010002484A1 (en) 2001-05-31
US5996066A (en) 1999-11-30
SG103284A1 (en) 2004-04-29
EP0836137A2 (en) 1998-04-15
SG54569A1 (en) 1998-11-16
US20020091910A1 (en) 2002-07-11

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