JPH0388029A - Register filing device - Google Patents

Abstract

PURPOSE:To efficiently transfer argument and to utilize a register by opening the window of optimum size in each transfer procedure of the argument of an optional number and executing the proper access protection of the window. CONSTITUTION:A register whose register number is to be accessed is specified from an input 13. An adder 9 in an absolute register number calculating device 3 calculates the absolute register number of the register based upon the specification signal. The number is decided by a decoder 10 and inputted by an access protection circuit 12. On the other hand, the output of the adder 9 is compared with the output 15 of a RAM 7 indicating the upper limit of a register window by a comparator circuit 11. When the output of the adder 9 is less than the upper limit, a register file 1 is accessed. When the output of the adder 9 is larger, a select signal 16 is invalidated and an invalid access detection signal 17 is generated. Thus, access protection is executed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) This invention relates to a register file device used in microprocessors and computers.

(Prior art) In recent years, with the increase in the density of LSI integration, it has become possible to implement general-purpose registers of several tens to hundreds of words in central processing units. Microprocessors have been developed that utilize this technology to process procedure calls/returns at high speed.Currently, the most commonly used program development method is to divide processing into many procedures or modules. Therefore, processing call/return of procedures at high speed during execution of processing greatly contributes to speeding up the overall program processing.

It is desirable that a register file device suitable for executing a program that uses a lot of procedural processing as described above satisfies the following three points.

(1) A local register allocated to each procedure must be provided. In addition, local registers must have a protection function against access from procedures other than the procedure to which they are assigned.

(2) An arbitrary number of arguments can be handed over in a procedural manner.

(3) Any number of local registers can be allocated for each procedure.

In a program like the one above, variables can be classified into global variables that can be referenced by all procedures and local variables that are unique to a procedure. When a procedure is called, arguments are passed and local variables currently in use are saved. Furthermore, when returning from the procedure, the local variables are restored onto the work area and processing continues. In order to perform these processes at high speed, it is recommended to configure the register file to include, in addition to global registers that can be accessed from all procedures, local registers that are allocated to each procedure (requirement (1) above). ).

If local variables are handled in local registers, there is no need to save/restore local variables when calling/returning a procedure. It is also necessary to have an access protection function to prevent these local variables from being destroyed by other procedures or from referencing non-existent variables (requirement (1) above).
.

Furthermore, the number of arguments and the number of local variables used in a procedure vary depending on the procedure. Furthermore, the number of registers is finite, and in order to handle multiple procedure calls, it is necessary to allocate an optimal number of registers to each procedure and use the registers efficiently. To this end, it is necessary to be able to allocate any number of local registers for each procedure and to be able to pass any number of variables (requirements (2) and (3) above).

Currently released microprocessors implement local registers using the following method.

First, in addition to normal access using the absolute register number unique to each register, a stack pointer 51 is provided for the register file 50 as shown in FIG. 6(a), and the value of this stack pointer and offset <register Number @〉
This method allows indirect access to local registers.

With this method, any number of arguments can be received and passed to other procedures, and as many local registers as necessary can be used within one procedure. However, with this method, it is not possible to clearly specify the range of registers used in a specific procedure, so access to registers used only by other procedures is free, and reliability is not guaranteed in terms of register access protection. cannot be said to be sufficient. In order to implement the access protection function, the upper and lower limits of the absolute register numbers of the registers currently in use are stored in memory or registers, and the absolute register numbers of the accessed registers are stored every time a register is accessed. However, software must check whether or not the value exceeds this range, which increases execution overhead.

Another configuration method is to allocate mutually overlapping register windows 52 to each procedure, as shown in FIG. 6(b).

This method uses the number of registers that overlap 53,
Since the number of registers that can be used within a procedure is fixed,
The number of registers that can be quickly transferred between procedures and the number of registers that can be used in one procedure are limited. Therefore, if the number of registers used is less than a fixed value, unused registers are wasted. Furthermore, if a large number of registers are used, processing must be performed by software, such as saving the contents of the registers to memory, resulting in a loss of high-speed execution.

Figure 6 (C) shows the configuration of other local registers.
As shown in FIG. 2, there is a method in which local registers are divided into several register banks 54 and one bank is assigned to one procedure. In this method, only the assigned bank can be accessed, so register access is protected. However, the number of words in the register bank is fixed, and arguments cannot be passed by hardware. Therefore, although this bank-structured local register is considered suitable for multitask processing, it is not suitable for processing that involves frequent procedure calls/returns.

(Problems to be Solved by the Invention) As described above, conventional devices each have their own advantages and disadvantages. There has been a problem in that it is not possible to simultaneously provide appropriate access protection to local registers allocated subsequently.

This invention was made in order to solve the above-mentioned drawbacks of the prior art, and it is possible to pass an arbitrary number of arguments, and to allocate a local register of an optimal size for each procedure. It is an object of the present invention to provide a register file device capable of opening a register window of any size and providing appropriate access protection to local registers other than the opened register window.

[Structure of the Invention] (Means for Solving the Problems) In order to solve the above problems, the present invention provides a register file 1 having a large number of registers, as shown in FIG.
and a storage device 2 for storing the range of register windows used in the past and present in the register file 1, that is, the upper and lower limits of the register window.
and an absolute register number calculation device that calculates the absolute register number of this register from the information indicating the range of the register window stored in the storage device 2 and the register number of the register to be accessed. 3, and the absolute register number calculation device 3
The signal indicating the absolute register number of the register to be previously accessed, calculated by a register select signal generator 4 that determines whether it is within or outside the range of the window, generates a register select signal 5 if it is within the window, and generates an unauthorized access detection signal 6 if it is outside the window; The purpose is to provide a device.

(Operation) In the apparatus shown in FIG. 1, access protection in the process of accessing a register will first be explained.

The storage device 2 stores the upper and lower limits of register windows used currently and in the past, and the newest information among the stored information is read out. To access a register, first convert the register number (offset) of the register to be accessed into an absolute register number.

This calculates the register number of the register to be accessed and the absolute register number of the lower limit value of the current window stored in the storage device 2 by the absolute register number calculation device 3.
This is done by adding at . Once the absolute register number of the register to be accessed is obtained in this way, it is then determined whether this register is within the range of the current window. This determination is made in the register select signal generating device 4 by comparing information indicating the current window range stored in the storage device 2, specifically, the upper limit value of the register window, and the absolute register number calculated above. It is done by doing.

If it is determined by this comparison that the register to be accessed is within the register window, the register select signal generator 4 generates a register select signal @5 and accesses the register. On the other hand, if it is determined that it is outside the register window, the register select signal generator 4 generates an unauthorized access detection signal 6, and the register is not accessed. In this way, protection is provided against accessing registers outside the register window.

Next, the case of calling a procedure will be explained. A procedure call is executed by writing the upper and lower limit values of the register window to be used in the next procedure into the storage device 2. At this time, by setting the lower limit value of the new register window smaller than the upper limit value of the current register window, both register windows overlap, and arguments are automatically received and passed. In this way, arbitrary values can be specified for the size of the register window and the number of arguments.

Return from the procedure is performed by erasing the upper and lower limit values (the newest information) of the current register window from the storage device 2. After erasing, the next new information becomes valid and the previously opened register window is automatically recreated.

(Example) Hereinafter, an example of the present invention will be described with reference to the drawings. Note that in the following drawings, the same reference numerals as in FIG. 1 indicate the same constituent members, and therefore duplicate explanations will be omitted.

FIG. 2 is a block diagram of an embodiment of the present invention. In this device, the storage device 2 is configured as a stack from which the newest information is read using a RAM (random access memory) 7 and a stack pointer 8. This R
AM7 stores the absolute register numbers of the upper and lower limits of the register window. The width of one word of RAM 7 depends on the number of words of the register file.

In this embodiment, the absolute register number calculating device 3 includes an adder 9 that adds the lower limit value of the register window stored in the storage device 2 and the register number (of the designated register to be accessed); It is composed of a decoder 10 that decodes the absolute register number assigned. Further, the register select signal generation bag @4 includes a comparator 11 that compares the upper limit value of the register window stored in the storage device 2 and the absolute register number calculated by the absolute register number calculation device 3, and the result of this comparison. The access protection circuit 12 is configured to assert/negate a register select signal according to the following. Note that 1 indicates a register file similar to that in FIG.

Next, the operation of the apparatus shown in FIG. 2 will be explained.

Register access is performed as follows.

First, the register to be accessed is specified using the register number from input 13. This register designation signal is added to the signal 18 indicating the lower limit of the current register window stored in the storage device 2 in the adder 9 of the absolute register number calculation bag W3, and the absolute register number of the input register is calculated. Calculated. The calculated absolute register number is decoded in the decoder 10 and the signal 14
The signal is input to the access protection circuit 12 of the register select signal generator 4 as a signal. On the other hand, the output of adder 9 indicating the absolute register number and RA indicating the upper limit of the register window
The output 15 of M7 is input to the comparison circuit 11 of the register select signal generator 4 and compared there. Based on this comparison result, the access protection circuit 12 generates a register select signal 16 and accesses the register file 1 if the absolute register number of the register to be accessed is smaller than the upper limit of the register window. If it is determined from the above comparison result that the calculated absolute register number is larger than the upper limit of the register window, the access protection circuit 12 invalidates the register select signal 16 and further outputs the illegal access detection signal 17 from the comparison circuit 11. Occur. In this way, access protection is achieved for registers outside the current register window.

The procedure is called as follows. First, the stack pointer 8 is pre-decremented (or b-incremented) and the upper and lower limits of the register window used in the new procedure are written. These upper limits are input to the input 13 of the absolute register number calculation device 3 as "next The number of new registers to be used in the procedure is input and the adder 9 adds this value to the current upper limit value.The lower limit value is determined by the absolute register number calculation device 3.
Input 13 of ``the number of registers currently used but not used in the next procedure (number of registers to be pushed onto the register stack)'', and adder 9 adds this value to the current register window. It is obtained by taking the sum of the lower limit values.

With the above operations, you can open a register window of any size. Also, by overlapping both register windows at this time, any number of arguments can be passed.

Return from the procedure is performed by incrementing (or decrementing) the stack pointer 8 and erasing the upper and lower limits of the current register window.This operation makes the upper and lower limits of the register window in the previous procedure valid. The register window of the previous procedure is automatically recreated.

FIG. 3 is a block diagram showing another embodiment of the invention. In this embodiment, the storage device 2 of FIG. 1 includes a 2-bit tag register 20rl corresponding to each word of the register.
has been completed. Note that 1 bit indicates the upper limit of the current and past register windows in the top tag register 20a.
The other bit is the base tag register 20b indicating the lower limit of the current and past register windows. The tag of the register that is the upper or lower limit is 1, and the others are ○. The absolute register number calculation device 3 is a priority register converter that converts the contents of the tag register 20 into a numerical value.
It is composed of an encoder 21, an adder 22, and a decoder 23. The register select signal generator 4 also includes a window extraction circuit 24 that extracts the range of the current register window from the outputs of the base tag register and the top tag register, and asserts a register select signal 26 based on the output of this window extraction circuit 24. /negate access protection circuit 25. Note that 1 indicates a register file.

Next, the operation of the apparatus shown in FIG. 3 will be explained.

Register access is performed as follows. First, the register to be accessed is specified using the register number from the input 27. On the other hand, the value of the base tag register 20b indicating the lower limit of the current register window is input to the priority encoder 21 and converted into an absolute register number of the register. This value and the designated register number are added in an adder 22 to calculate the absolute register number of the register to be accessed.

Signal 28 indicating the calculated absolute register number is decoded by decoder 23 to generate signal 29. Window extraction circuit 2 of register select signal generator 4
4 generates a signal 30 indicating the current register window range from the values of the base tag register 20b and top tag register 20a. The access protection circuit 25 outputs the register select signal 26 (O is valid) only when accessing a register within the register window by taking the logical product of the signals 29 and 30, and prevents access to registers outside the register window. If an attempt is made to do so, an unauthorized access detection signal 31 is generated.As described above, registers outside the current register window are
Access protection is provided.

FIGS. 4(a) and 4(b) are diagrams showing the specific circuit configuration and operation of a portion of the device in FIG. 3, taking as an example the case where register number 3 is accessed.

Assume that in register file 1, a register window with register number @O-4 and absolute register number 2-6 is open, as shown in FIG. 4(b). Figure 4 (
As shown in FIG. 4(b), the base tag register 20b stores a tag representing the lower limit value of the register window shown in FIG. 21 and is converted into an absolute register number "2", which is further input to an adder 22. Since the number 3 of the register to be accessed is simultaneously input to the adder 22, the two are added here to obtain the absolute register number "5". This value is decoded by decoder 23 and signal 29 is generated.

On the other hand, base and top tag registers 20b.

The tags stored in 20a are the first logic circuits 24a and 24b of the window extraction circuit 24 shown in FIG. 4(b).
are respectively input into the register window and are converted into numerical signals 32 and 33 indicating the upper and lower limits of the register window. These signals 32 and 33 are further processed by a second
A signal 30 indicating the window range is obtained. The signal 30 and the above-mentioned signal 29 are input together to the access protection circuit 25 consisting of a NAND circuit, and by taking the AND of the two, a register select signal 26 (O is generated only when the register to be accessed is within the register window) is generated. In this case, the register number to be accessed is 3 (absolute register number 5) and is within the register window, so the signal O is generated and the register is accessed.

The procedure is called as follows.

First, the top tag register is updated.

FIG. 5 <a> is a diagram showing how the top tag register is updated when three new registers are used, and the procedure for updating the top tag register will be explained with reference to this diagram. . First, in the absolute register number calculating device 3, the absolute register number of the current upper limit register is calculated by the priority encoder 21 from the value of the top tag register 2Qa. The adder 22 adds to this value the number of registers to be used in the next procedure, "3", to obtain the absolute register number of the upper limit register. This value is decoded by the decoder 23,
Specify a new upper limit register and write 1 to the top tag register 20a as shown. In addition, the base
To update the tag register 20b, the absolute register number calculation device 3 is provided with the value of the base tag register and "the number of registers that are currently used but will not be used in the next procedure (the number of registers to be bushed in the register stutter)". This is done similarly by typing. This operation allows you to open a register window of any size. You can also pass any number of arguments by overlapping the register windows.

To return from the procedure, use the top u11 tag register.
This is done by swallowing 1. The top tag register is updated as follows. First, in the absolute register number calculation device 3, the top tag register 20a
The absolute register number of the current upper limit register is determined from the value of . The absolute register number of the current upper limit register is decoded to designate the register, and 0 is written to the top tag register 20a. FIG. 5(b) shows how the top tag register is updated. To update the base tag register 20b, the absolute register number calculation device 3 updates the base tag register 20b.
The same thing can be done by inputting the value of . This operation makes the upper and lower limits of the register window in the previous procedure valid, and the register window of the previous procedure is automatically reproduced.

In this embodiment, the logic circuits associated with one word of the register have the same structure, and the register file can be constructed by repeating the same circuits regardless of the number of words in the register.
Suitable for VLSI and highly expandable. Furthermore, compared to the first embodiment in which a stack is used as a storage device, the number of procedures to be called is not limited by the number of words in the stack.

In this embodiment, the delay of the window extraction circuit 24 and the priority encoder 21 is the key to speeding up the operation. The delay of the window extraction circuit can easily be sped up to the order of the logarithm of the number of registers by known techniques such as carry look ahead techniques. In addition, the priority encoder operates by calling a procedure,
This only occurs when the value of the tag register changes upon return from the procedure. To execute procedure calls and return instructions,
Since it takes time compared to the execution of other instructions, the delay of the priority encoder is not a problem at all. [Effects of the Invention] As described above, according to the register fill device of the present invention, the delay of the priority encoder is not a problem at all. With a simple circuit configuration, it is possible to pass any number of arguments, it is possible to open an optimally sized register window for each procedure, and it is possible to apply appropriate access protection to the opened register window. Because you can
It achieves efficient argument passing and register utilization, and is extremely effective.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the basic configuration of a device of the present invention, FIG. 2 is a block diagram of an embodiment of the device of the present invention, and FIG. 3 is a block diagram of a second embodiment of the device of the present invention. Fourth
5 and 5 are diagrams for explaining the detailed configuration and operation of a part of the device shown in FIG. 3, and FIG. 6 is a diagram for explaining the conventional device. 1...Register file 2...Storage device 3...
- Absolute register number calculation device 4... Register select signal generation device 5... Register select number 6... Unauthorized access detection signal

Claims (1)

[Scope of Claims] A register file including a large number of registers, a storage device for storing a range of register windows in the past and in use in the register file, and a range of register windows stored in the storage device. an absolute register number calculation device that calculates an absolute register number of this register from information and a register number of the register to be accessed, and an absolute register number of the register to be accessed calculated by the absolute register number calculation device; It compares the signal with information indicating the range of the register window stored in the storage device to determine whether the register to be accessed is within or outside the range of the window in use, and if it is within the window, selects the register. A register file device comprising: a register select signal generating device that generates a signal and generates an unauthorized access detection signal if the signal is outside the window.